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Silicon Labs /Series0 /EZR32HG /EZR32HG320F32R63 /CMU /CMD

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Interpret as CMD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HFCLKSEL 0 (CALSTART)CALSTART 0 (CALSTOP)CALSTOP 0USBCCLKSEL

Description

Command Register

Fields

HFCLKSEL

HFCLK Select

1 (HFRCO): Select HFRCO as HFCLK.

2 (HFXO): Select HFXO as HFCLK.

3 (LFRCO): Select LFRCO as HFCLK.

4 (LFXO): Select LFXO as HFCLK.

5 (USHFRCODIV2): Select USHFRCO divided by two as HFCLK.
CALSTART

Calibration Start
CALSTOP

Calibration Stop
USBCCLKSEL

USB Core Clock Select

2 (LFXO): Select LFXO as HFCORECLKUSBC.

3 (LFRCO): Select LFRCO as HFCORECLKUSBC.

4 (USHFRCO): Select USHFRCO as HFCORECLKUSBC.

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data